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? semiconductor components industries, llc, 2008 december, 2008 ? rev. 2 1 publication order number: amis ? 39101/d AMIS-39101 octal high side driver with protection general description the amis ? 39101 is a robust high side driver ic featuring eight independent high current output drive channels along with a number of integrated fault ? protection circuits. this highly integrated product is designed for controlled delivery of po wer to a large variety of loads in industrial applications including mo tors, relays and led arrays, among others. with all driver output channels in the conducting state, each channel can source up to 350 ma of continuous current (resistive load). in cases where all output drivers are not active, higher output current per channel can be achieved provided that the thermal limits of the device are not exceeded. furthermore, in order to minimize system cost each output driver has built ? in fly ? back diodes. the device withstands short ? circuits to ground and supply, respectively. it is designed with an array of integrated protection features including over ? temperature and over ? current detection and shut down. the integrated charge pump requires only one external capacitor and provides for operation of the critical fault ? protection circuitry even in case of low supply voltages. the device can be interfaced to a variety of microcontrollers via the serial interface link, in turn allowi ng for monitoring and controlling the state of each of the output drivers i ndividually. in this case, at the onset of a potential hazardous situation the drivers are switched off and the diagnostic state of the drivers can be extracted via the serial interface. the device also features a power down mode for reduced power consumption and has high built ? in electrostatic discharge (esd) protection capability for robust operation. key features ? eight high side output drivers ? up to 830 ma continuous current per driver pair (resistive load) ? charge pump with one external capacitor ? serial interface ? short ? circuit protection ? diagnostic features ? power ? down mode ? internal thermal shutdown ? 3.3 v and 5 v microcontroller compliant ? excellent system esd ? automotive compliant ? so28 package with low r ja ? this is a pb ? free device* typical applications ? actuator control ? led drivers ? relays and solenoids ? industrial process control ? automotive load management soic 28 pn suffix case 751ar http://onsemi.com 1 *for additional information on our pb ? free strategy and soldering details, please download the on semiconductor soldering and mounting techniques reference manual, solderrm/d. see detailed ordering and shipping information in the package dimensions section on page 2 of this data sheet. ordering information
amis ? 39101 http://onsemi.com 2 ordering information product name package shipping configuration temperature range amis39101pnpb4g psop 300-28 (jedec ms-013) tube/tray ? 40 c to 85 c amis39101pnpb4rg psop 300-28 (jedec ms-013) tape & reel ? 40 c to 85 c note: for additional information on our pb ? free strategy and soldering details, please download the on semiconductor soldering and mounting techniques reference manual, solderrm/d. out1 out2 out3 out4 vs1 out1 vs2 out2 out3 out4 out5 out6 out7 out8 vs3 out5 vs4 out6 out7 out8 logic control power on reset thermal shutdown serial interface diagnostic oscillator charge ? pump bandgap amis ? 39101 5 gnd4 gnd5 gnd6 gnd3 gnd2 capa1 din dout clk wr vddn 4 6 10 9 11 19 18 20 24 23 25 7 8 15 21 22 28 26 17 27 12 13 2 3 test2 11416 test gnd1 pdb test1 figure 1. block diagram
amis ? 39101 http://onsemi.com 3 amis ? 39101 out1 gnd1..6 vcc vs din dout clk wr pdb 26 5 3 13 2 12 19 7 24 27 11 25 21 10 micro ? controller gnd 5v ? reg test1..2 vs1..4 vddn 8 15 28 22 116 14 17 capa out8 4 6 18 20 23 9 figure 2. typical application diagram c vcc c vddn c out1 c out8 r load8 l load8 l load1 r load1 c cp c vs external components it is important to properly decouple the power supplies of the chip with external capacitors that have good high frequency properties. the vs1, vs2, vs3, and vs4 pins are shorted on the pcb level. also gnd1, gnd2, gnd3, gnd4, gnd5, gnd6, test, test1, and test2 are shorted on the pcb level. table 1. external components component function min. value max. tol. [%] units c vs decoupling capacitor; x7r 100 20 nf c charge_pump charge pump capacitor (note 1) 0.47 47 nf c out (note 2) emc connector on connector 1 nf c out (note 2) decoupling capacitors; 50 v 22 20 nf c vdd decoupling capacitors; 50 v 22 20 nf r load load resistance 65 10 l load load inductance at maximum current 300 350 mh 1. the capacitor must be placed close to the amis ? 39101 pins on the pcb. 2. both capacitors are optional and depend on the final application and board layout.
amis ? 39101 http://onsemi.com 4 figure 3. pin description of the amis ? 39101 amis ? 39101 test1 clk wr out1 vs1 out2 gnd1 gnd2 out3 vs2 out4 din dout test2 gnd6 vddn pdb out8 vs4 out7 gnd5 gnd4 out6 vs3 out5 capa1 test gnd3 table 2. pin out pin name description 1 test1 connect to gnd 2 clk schmitt trigger serial interface clk input 3 wr schmitt trigger serial interface write enable input 4 out1 hs driver output 5 vs1 vs power supply 6 out2 hs driver output 7 gnd1 power ground and thermal dissipation path junction ? to ? pcb 8 gnd2 power ground and thermal dissipation path junction ? to ? pcb 9 out3 s driver output 10 vs2 vs power supply 11 out4 hs driver output 12 din serial interface input pin (schmitt trigger or cmos inverter) 13 dout digital three state output for serial interface 14 test2 connect to gnd 15 gnd3 power ground and thermal dissipation path junction ? to ? pcb 16 test connect to gnd 17 capa1 charge pump capacitor pin 18 out5 hs driver output 19 vs3 vs power supply 20 out6 hs driver output 21 gnd4 power ground and thermal dissipation path junction ? to ? pcb 22 gnd5 power ground and thermal dissipation path junction ? to ? pcb 23 out7 hs driver output 24 vs4 vs power supply 25 out8 hs driver output 26 pdb schmitt trigger power ? down input 27 vddn digital supply 28 gnd6 power ground and thermal dissipation path junction ? to ? pcb
amis ? 39101 http://onsemi.com 5 electrical and environmental ratings table 3. absolute maximum ratings symbol description min. max. unit vddn power supply voltage gnd ? 0.3 6 v vs vs power supply on pins vs1 to vs4, load dump, pulse 5b 400 ms gnd ? 0.3 35 v iout_on maximum output current outx pins (note 3) the hs driver is switched on ? 3000 350 ma iout_off maximum output current outx pins (note 3) the hs driver is switched off ? 350 350 ma i_out_vs maximum output current vs1, 2, 3, 4 pins ? 700 3750 ma vcapa1 dc voltage on pin capa1 0 vs+16.5 v vdig_in voltage on digital inputs clk, pdb, wr, din ? 0.3 vddn+0.3 v v esd pins that connect the application (pins vs1..4 and out1..8) (note 4) all other pins (note 4) ? 4 ? 2 +4 +2 kv kv v esd esd according charged device model (note 5) ? 750 +750 v tj junction temperature (t<100 hours) ? 40 175 c tmr ambient temperature under bias ? 40 85 c stresses exceeding maximum ratings may damage the device. maximum ratings are stress ratings only. functional operation above t he recommended operating conditions is not implied. extended exposure to stresses above the recommended operating conditions may af fect device reliability. 3. the power dissipation of the chip must be limited not to exceed the maximum junction temperature tj. 4. according to hbm standard mil ? std ? 883 method 3015.7. 5. according to norm eos/esd ? stm5.3.1 ? 1999 robotic mode. thermal characteristics table 4. thermal characteristics of the package symbol description conditions value unit r th(vj ? a) thermal resistance from junction to ambient in power ? so28 package in free air 145 k/w table 5. thermal characteristics of the amis ? 39101 on a pcb pcb design conductivity ? top and bottom layer rthja (note 6) unit two layer (35 m) copper planes according to figure 4 + 25% copper for the remaining areas 24 k/w two layer (35 m) copper planes according to figure 4 + 0% copper for the remaining areas 53 k/w four layer jedec: eia/jesd51 ? 7 25% copper coverage 25 k/w one layer jedec: eia/jesd51 ? 3 25% copper coverage 46 k/w 6. these values are informative only.
amis ? 39101 http://onsemi.com 6 7.5 17.9 114.3 76.2 5 mm 5 mm 5 mm gnd copper 5 mm top pcb view 114.3 76.2 ground plane gnd copper 25 % filled by gnd copper bottom pcb view figure 4. layout recommendation for thermal characteristics
amis ? 39101 http://onsemi.com 7 electrical parameters operation outside the operating ranges for extended periods may affect device reliability. total cumulative dwell time above the maximum operating rating for the power supply or temperature must be less than 100 hours. the parameters below are independent from load type. (see load specific parameters section) table 6. operating ranges symbol description min. max. unit vddn digital power supply voltage 3.1 5.5 v vdig_in voltage on digital inputs clk, pdb, wr, din ? 0.3 vddn v vs (1) vs power supply on pins vs1 to vs4 3.5 28 v tamb ambient temperature ? 40 85 c 7. the power dissipation of the chip must be limited not to exceed maximum junction temperature tj of 130 c. table 7. electrical characteristics symbol description min. max. unit i_vs_norm (note 8) consumption on vs without load currents in normal mode of operation pdb = high 3.5 ma i_pdb_3.3 (notes 8 and 9) sum of vs and vddn consumption in power ? down mode of operation pdb = low, vddn 3.3 v, vs = 24 v, 23 c ambient clk and wr are at vddn voltage 25 a i_pdb_5 (notes 8 and 9) sum of vs and vddn consumption in power ? down mode of operation pdb = low, vddn 5 v, vs = 24 v, 23 c ambient clk and wr are at vddn voltage 40 a i_pdb_max_vs vs consumption in power ? down mode of operation pdb = low, vs = 28 v 10 a i_vddn_norm (note 8) consumption on vddn, in normal mode of operation pdb = high clk is 500 khz, vddn = 5.5 v, vs = 28 v 1.6 ma r_on_1..8 on resistance of the output drivers 1 through 8 t vs = 24 v (nominal vs power supply condition) t vs = 4.6 v (worst case vs power supply condition) 1 3 i_out_lim_x (note 8) internal over ? current limitation of hs driver outputs 0.65 2 a t_shortgnd_hsdoff the time from short of hs driver outx pin to gnd and the driver deactivation; driver is off detection works from vs minimum of 7 v, vddn minimum is 3 v 5,4 s tsd_h (note 8) high tsd threshold for junction temperature (temperature rising) 130 170 c tsd_hyst tsd hysteresis for junction temperature 9 18 c 8. the power dissipation of the chip must be limited not to exceed maximum junction temperature tj. 9. the cumulative operation time mentioned above may cause permanent device failure.
amis ? 39101 http://onsemi.com 8 load specific parameters high side driver parameters for specific loads are specified in following categories: 1. parameters for inductive loads up to 350 mh and t ambient up to 85 c 2. parameters for inductive loads up to 300 mh and t ambient up to 85 c 3. parameters for resistive loads and t ambient up to 85 c table 8. load specific characteristics symbol description min. max. unit a. inductive load up to 350 mh and t ambiant up to 85 c i_out_on_max. maximum output per hs driver, all eight drivers might be active simultaneously 240 ma b. inductive load up to 300 mh and t ambiant up to 85 c i_out_on_max. maximum output per hs driver, all eight drivers might be active simultaneously 275 ma c. resistive load and t ambiant up to 85 c i_out_on_max. maximum output per hs driver, all eight drivers might be active simultaneously 350 ma maximum output per one hs driver, only one can be active 650 ma maximum output per hs driver, only two hs drivers from a different pair can be active simultaneously 500 ma maximum output per one hs driver pair 830 ma note: the parameters above are not tested in production but are guaranteed by design. the overall current capability limitations need to be respected at all times. the maximum current specified in table 8 cannot always be obtained. the practically obtainable maximum drive current heavily depends on the thermal design of the application pcb (see thermal characteristics section). the available power in the package is: (tsd_h ? t_ambient) / rthja with tsd_h = 130 c and rthja according to table 5. charge pump the high side drivers use floating ndmos transistors as power devices . to provide the gate voltages for the ndmos of the high side drivers, a charge pump is integrated. the storage capacitor is an external one. the charge pump oscillator has typical frequency of 4 mhz. diagnostics short circuit diagnostics the diagnostic circuit in the amis ? 39101 monitors the actual output status at the pins of the device and stores the result in the diagnostic register which is then latched in the output register at the rising edge of the wr ? pin. each driver has its corresponding diagnostic bit diag_x. by comparing the actual output status (diag_x) with the requested driver status (cmd_x) you can diagnose the correct operation of the application according to table 9. thermal shutdown (tsd) diagnostic in case of tsd activation, all bits diag1 to diag8 in the serial interface output register are set into the fault state and all drivers will be switched off (see table 9). the tsd error condition is active until it is reset by the next correct communication on serial interface (i.e. number of clock pulses during wr = 0 is divisible by 8), provided that the device has cooled down under the tsd trip point. table 9. out diagnostics requested driver status cmd_x actual output status diag_x diagnosis on 1 high 1 normal state on 1 low 0 short to ground or tsd (note 11) off 0 high 1 short to vs or missing load (note 10) or tsd (note 11) off 0 low 0 normal state (note 10) 10. the correct diagnostic information is available after t_diagnostic_off time. 11. all 8 diagnostic bits diag_x must be in the fault condition to conclude a tsd diagnostic. ground loss due to its design, the amis ? 39101 is protected for withstanding module ground loss and driver output shorted to ground at the same time.
amis ? 39101 http://onsemi.com 9 table 10. power loss vddn vs possible case action 0 0 system stopped nothing 0 1 start case or sleeping mode with missing vddn eight switches in the off ? state power down consumption on vs 1 0 missing vs supply vddn normally present eight switches in the off ? state normal consumption on vddn 1 1 system functional nominal functionality serial interface the serial interface is used to allow an external microcontroller (mcu) to communicate with the device. the amis ? 39101 always acts as a slave and it can?t initiate any transmission. serial interface transfer format and pin signals the serial interface block diagram and timing characteristics are shown in figures 6 and 7. during a serial interface transfer, data is simultaneously sent to and received from the device. a serial clock line (clk) synchronizes shifting and sampling of the information on the two serial data lines (din and dout). dout signal is the output from the amis ? 39101 to the external mcu and din signal is the input from the mcu to the amis ? 39101. the wr ? pin selects the amis ? 39101 for communication and can also be used as a chip select (cs) in a multiple ? slave system. the wr ? pin is active low. if amis ? 39101 is not selected, dout is in high impedance state and it does not interfere with serial interface bus activities. since amis ? 39101 always shifts data out on the rising edge and samples the input data also on the rising edge of the clk signal, the mcu serial interface port must be configured to match this operation. serial interface clock idles high between the transferred bytes. the diagram in figure 7 represents the serial interface timing diagram for 8 ? bit communication. communication starts with a falling edge on the wr ? pin which latches the status of the diagnostic register into the serial interface output register. subsequently, the cmd_x bits ? representing the newly requested driver status ? are shifted into the input register and simultaneously, the diag_x bits ? representing the actual output status ? are shifted out. the bits are shifted with x = 1 first and ending with x = 8. at the rising edge of the wr ? pin, the data in the input register is latched into the command register and all drivers are simultaneously switching to the newly requested status. serial interface communication is ended. in case the serial interface master does only support 16 ? bit communication, then the master must first send 8 clock pulses with dummy din data and ignoring the dout data. for the next 8 clock pulses the above description can be applied. the required timing for serial to peripheral interface is shown in table 11. table 11. digital characteristics symbol description min. max. unit t_clk maximum applied clock frequency on clk input 500 khz t_data_ready time between falling edge on wr and first bit of data ready on dout output (driver going from hz state to output of first diagnostic bit) 2 s t_clk_first first clock edge from falling edge on wr 3 s t_setup (note 12) setup time on din 20 ns t_hold (note 12) hold time on din 20 ns t_data_next time between rising edge on clk and next bit ready on dout (capa on dout is 30 pf max.) 100 ns t_serial interface_end time between last clk edge and wr rising edge 1 s t_risefall rise and fall time of all applied signals (maximum loading capacitance is 30 pf) 5 20 ns t_wr time between two rising edge on wr (repetition of the same command) 300 s 12. guaranteed by design
amis ? 39101 http://onsemi.com 10 normal mode verification: ? the command is the set of eight bits loaded via serial interface, which drives the eight hs drivers on or off. ? the command is activated with rising edge on wr pin. table 12. digital characteristics symbol description min. max. unit t_command_l_max. (note 13) minimum time between two opposite commands for inductive loads and maximum hs driver current of 275 ma 1 s t_command_r (note 13) minimum time between two opposite commands for resistive loads and maximum hs driver current of 350 ma 2 ms t_pdb_recov the time between the rising edge on the pdb input and 90 percent of vs ? 1v on all hs driver outputs. (all drivers are activated, pure resist- ive load 35 ma on all outputs) 1 ms 13. guaranteed by design figure 5. timing for power ? down recovery t 50% pd 90% t_pd_recov v outi {v bi ? 1 v} input register command register cmd8 output register diag8 diagnostic register hs driver hs driver din dout out1 out8 figure 6. serial interface block diagram dout cmd7 cmd6 cmd5 cmd4 cmd3 cmd2 cmd1 cmd8 cmd7 cmd6 cmd5 cmd4 cmd3 cmd2 cmd1 diag7 diag6 diag5 diag4 diag3 diag2 diag1 diag8 diag7 diag6 diag5 diag4 diag3 diag2 diag1
amis ? 39101 http://onsemi.com 11 cmd1 wr data transfer from diagnostic register to output register at falling edge wr cmd2 cmd3 cmd4 cmd5 cmd6 cmd7 cmd8 diag1 diag2 diag3 diag4 diag5 diag6 diag7 diag8 clk din dout out out 1 to 8 hiz hiz data transfer from input register to command register at rising edge wr 12345678 x figure 7. timing diagram quality and reliability a quality system with certification against ts16949 is maintained. an aec ? q100 compatible product qualification is performed. monitoring of production is performed according to the dedicated amis specifications for assembly and wafer fabrication. all products are tested using a production test program. lot conformance to specification in volume production is guaranteed by means of following quality conformance tests: table 13. qualification qc test conditions aql level inspection level electrical functional and parametric to product data sheet 0.04 ii external visual (mechanical) physical damage to body or leads (e.g. bent leads) dimensions affecting pcb manufacturability (e.g. coplanarity) 0.15 ii external visual (cosmetic) correctness of marking all other cosmetic defects 0.65 ii note: each production lot will be accompanied with a certificate of conformance. company or product inquiries for more information about on semiconductor?s products or services visit our web site at http://www.onsemi.com .
amis ? 39101 http://onsemi.com 12 package dimensions soic 28 w case 751ar ? 01 issue o on semiconductor and are registered trademarks of semiconductor components industries, llc (scillc). scillc reserves the right to mak e changes without further notice to any products herein. scillc makes no warranty, representation or guarantee regarding the suitability of its products for an y particular purpose, nor does scillc assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including wi thout limitation special, consequential or incidental damages. ?typical? parameters which may be provided in scillc data sheets and/or specifications can and do vary in different application s and actual performance may vary over time. all operating parameters, including ?typicals? must be validated for each customer application by customer?s technical experts. scillc does not convey any license under its patent rights nor the rights of others. scillc products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the scillc product could create a sit uation where personal injury or death may occur. should buyer purchase or use scillc products for any such unintended or unauthorized application, buyer shall indemnify and hold scillc and its of ficers, employees, subsidiaries, af filiates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, direct ly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that scillc was negligent regarding the design or manufacture of the part. scillc is an equal opportunity/affirmative action employer. this literature is subject to all applicable copyright laws and is not for resale in any manner. publication ordering information n. american technical support : 800 ? 282 ? 9855 toll free usa/canada europe, middle east and africa technical support: phone: 421 33 790 2910 japan customer focus center phone: 81 ? 3 ? 5773 ? 3850 amis ? 39101/d literature fulfillment : literature distribution center for on semiconductor p.o. box 5163, denver, colorado 80217 usa phone : 303 ? 675 ? 2175 or 800 ? 344 ? 3860 toll free usa/canada fax : 303 ? 675 ? 2176 or 800 ? 344 ? 3867 toll free usa/canada email : orderlit@onsemi.com on semiconductor website : www.onsemi.com order literature : http://www.onsemi.com/orderlit for additional information, please contact your local sales representative

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